Gurtej Singh Sandhu a renowned Semiconductor Industry Expert

Gurtej Singh Sandhu

Senior Fellow, Advanced Process Technology

Gurtej Sandhu is Senior Fellow and Vice President at Micron Technology. In his current role, he is responsible for Micron’s end-to-end (Si-to-Package) R&D technology roadmaps. The scope includes driving cross-functional alignment across various departments and business units to proactively identify technology gaps, and managing the engineering organization to resource and execute on developing innovative technology solutions for future memory scaling. Dr. Sandhu’s responsibilities include leading several internal project teams worldwide and managing interactions with research consortia around the world.

At Micron, Dr. Sandhu has held several engineering and management roles. He has been actively involved with a broad range of process technologies for IC processing and has pioneered several process technologies currently employed in mainstream semiconductor chip manufacturing.

Dr. Sandhu received a degree in electrical engineering at the Indian Institute of Technology, New Delhi, and a Ph.D. in physics at the University of North Carolina, Chapel Hill, in 1990. He holds over 1,300 U.S. patents and is recognized as one of the top inventors in the world. Dr. Sandhu is a Fellow of IEEE. In 2018, he received the IEEE Andrew S. Grove Award for outstanding contributions to silicon CMOS process technology that enables DRAM and NAND memory chip scaling.

Gurtej Singh Sandhu, also known as Gurtej Sandhu, is an inventor in the fields of thin-film processes and materials, VLSI and semiconductor device fabrication. He is recognized for being the all-time seventh most prolific inventor as measured by number of U.S. utility patents. Gurtej has 1382 U.S. utility patents as of October 19, 2021. He was Senior Fellow and Director of Advanced Technology Developments at Micron Technology, before becoming Senior Fellow and Vice President of Micron Technology.

The publication Kiplinger reports, "Sandhu developed a method of coating microchips with titanium without exposing the metal to oxygen, which would ruin the chips. Initially, he didn't think his idea was a big deal, but now most memory-chip makers use the process." The publication also states that Gurtej earned an electrical engineering degree at the Indian Institute of Technology – Delhi in India and a physics PhD at the University of North Carolina at Chapel Hill.

The Institute of Electrical and Electronics Engineers (IEEE) awarded Sandhu the 2018 IEEE Andrew S. Grove Award for outstanding contributions to solid-state devices and technology. They said his "pioneering achievements concerning patterning and materials integration have enabled the continuation of Moore’s Law for aggressive scaling of memory chips integral to consumer electronics products such as cell phones, digital cameras and solid-state drives for personal and cloud server computers." The IEEE states: "Sandhu initiated the development of atomic layer deposition high-κ films for DRAM devices and helped drive cost-effective implementation starting with 90-nm node DRAM. Extreme device scaling was also made possible through his pitch-doubling process, which led to the first 3X-nm NAND flash memory. Sandhu’s method for constructing large-area straight-wall capacitors enabled the formation of double-sided capacitors that extended the scaling of important one-transistor, one-capacitor (1T1C) device technologies. His process for CVD Ti/TiN is still in use for making DRAM and NAND chips."

Text : Internet